scv (System Call Vectored) instruction
Purpose
Calls the system to provide a service.
Note: The scv instruction is supported only in the PowerPC®
architecture.
Syntax
| Bits | Value |
|---|---|
| 0 - 5 | 17 |
| 6 - 10 | /// |
| 11 - 15 | /// |
| 16 - 19 | /// |
| 20 -26 | LEV |
| 27 - 29 | /// |
| 30 | 0 |
| 31 | 1 |
PowerPC®
| Item | Description |
|---|---|
| scv | LEV |
Description
The scv instruction causes a system call interrupt. The effective address (EA) of the instruction following the scv instruction is placed into the Link Register. Bits 0-32, 37-41, and 48-63 of the Machine State Register (MSR) are placed into the corresponding bits of Count Register. Bits 33-36 and 42-47 of the Count Register are set to undefined values.
The scv instruction has one syntax form. The syntax form does not affect the Machine State Register.
Note: The scv instruction has the same op code as the scv (System Call Vectored) instruction.
Parameters
| Item | Description |
|---|---|
| LEV | Must be 0 or 1. |