z/OS DFSMSdfp Advanced Services
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Program-Controlled Interruption Appendage

z/OS DFSMSdfp Advanced Services
SC23-6861-01

This appendage is entered if the channel finds one or more program-controlled-interruption (PCI) bits on in a channel program. It can be entered as many times as the channel finds PCI bits on, or more often. Before the appendage is entered, the contents of the subchannel status word are placed in the channel status word field of the input/output block.

Note that PCI and PCI appendages are not supported for zHPF channel programs.

A PCI appendage is reentered if an ERP is retrying a channel program in which a PCI bit is on. The IOB error flag is set when the ERP is in control (IOBFLAG1 = X'20'). (For special PCI conditions encountered with command retry, see Command Retry Considerations.)

To post the channel program from a PCI appendage to an EXCP request (EXCP V=V), use the procedure described in SIO Appendage.

If the step is running ADDRSPC=REAL (V=R) and an authorized program issued the EXCP request or if an EXCPVR request was issued, the PCI appendage uses central storage addresses. Use the following procedure to post the channel program from the PCI appendage. For more information on the POST macro, see z/OS MVS Programming: Authorized Assembler Services Guide and z/OS MVS Programming: Authorized Assembler Services Reference LLA-SDU.

The POST macro is coded as follows:
POST  ecbaddr,compcode,ASCB=addr,ERRET=addr,ECBKEY=key,
      LINKAGE=BRANCH,MEMREL=NO
The ERRET routine address must point to a BR 14 instruction. This instruction must be in storage addressable from any address space (for example, CVTBRET) and addressable by 24 bits.
Note: If you specify the ASCB parameter with MEMREL=NO, only registers 9 and 14 are restored when returning from the POST macro.

The following procedure posts the channel program from the PCI appendage.

  1. Save necessary registers, because only registers 9 and 14 are restored on the return from the POST macro.
  2. Set the ECB key in register 0.
  3. Set the 4-byte completion code in register 10.
  4. Set the ECB address in register 11.
  5. Set the error routine address in register 12, by setting it to address of CVTBRET and turn on the high-order bit (X'80') of the high-order byte.
  6. Set the ASCB address in register 13. If you do not have the ASCB address, you can use the following procedure to obtain the ASCB address:
    1. Issue the EPAR instruction to obtain the ASID. For information on the EPAR instruction, see z/Architecture Principles of Operation.
    2. Issue the LOCASCB macro to obtain the ASCB address. The LOCASCB macro is documented in z/OS MVS Programming: Authorized Assembler Services Reference LLA-SDU.
  7. Issue the POST macro, as shown in the following example:
    POST (11),(10),ASCB=(13),ERRET=(12),ECBKEY=(0),LINKAGE=BRANCH
  8. On return, reestablish necessary registers.

To return control to the system for normal operation, use the return address in register 14.

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