RSI format

The operand fields of RSI-format instructions designate two registers and a 16 bit immediate operand.

┌────────┬────┬────┬─────────────────┐
│Op Code │ R₁ │ R₃ │       I₂        │
└────────┴────┴────┴─────────────────┘
0         8   12   16               31

Symbols used to represent registers (see REG1 in the examples) are assumed to be equated to absolute values 0 - 15.

The immediate value is treated as a signed binary integer representing the number of halfwords to branch relative to the current location.

The branch target can be specified as a label in which case the assembler calculates the immediate value and performs some checking of the value.

The branch target can also be specified as an absolute value in which case the assembler issues a warning before it assembles the instruction.

Examples:

ALPHA1   BRXH            REG1,REG3,BETA1
BETA1    BRXLE           1,2,ALPHA1

When assembled, the object code for the instruction labeled ALPHA1, in hexadecimal, is

84130002

where:

84: Is the operation code
1: Is register REG1
3: Is register REG3
0002: Is the immediate data I2