lwa (Load Word Algebraic) instruction

Purpose

Load a fullword of data from storage into the low-order 32 bits of the specified general purpose register. Sign extend the data into the high-order 32 bits of the register.

Syntax

Bits Value
0 - 5 58
6 - 10 RT
11 - 15 RA
16 - 29 DS
30 - 31 0b10
PowerPC® 64 
lwa RT, Disp (RA)

Description

The fullword in storage located at the effective address (EA) is loaded into the low-order 32 bits of the target general purpose register (GRP) RT. The value is then sign-extended to fill the high-order 32 bits of the register.

DS is a 14-bit, signed two's complement number, which is sign-extended to 64 bits, and then multiplied by 4 to provide a displacement Disp. If GPR RA is not 0, the EA is the sum of the contents of GPR RA and Disp. If GPR RA is 0, then the EA is Disp.

Parameters

Item Description
RT Specifies target general-purpose register where result of the operation is stored.
Disp Specifies a 16-bit signed number that is a multiple of 4. The assembler divides this number by 4 when generating the instruction.
RA Specifies source general-purpose register for EA calculation.

Implementation

This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.