A program interrupt within a transaction is identified by bit 6
of the 16-bit interrupt code's being on. Thus, for example, a protection
exception within transactional execution mode would be interrupt code X'0204'.
If the transaction gets a program interrupt that is not filtered
(TBEGIN can identify some filtering of program interrupts), normal
z/OS program interrupt processing occurs (and the transaction is aborted).
Information about the PSW and registers at the time of the program
interrupt are captured by the system and made available to your recovery
routines, and certain diagnostic "rules" are applied.
ESPIE exit routines will get both the time of error registers/PSW
and the transaction-begin registers/PSW.
- Bit EPIEPITX: The program interrupt occurred while within transactional
execution.
- Existing fields EPIEGPR, EPIEG64S contain the time of error register
information. When bit EPIEPITX is off, these are the registers current
when the program interrupt occurred. When bit EPIEPITX is on, these
are the registers that resulted from the transaction abort due to
the program interrupt. Resume is done using these fields whether or
not bit EPIEPITX is on.
- Existing fields EPIEPSW, EPIEPSW16 contain the time of error PSW
information. When bit EPIEPITX is off, this is the PSW current when
the program interrupt occurred. When bit EPIEPITX is on, this is the
PSW that resulted from the transaction abort due to the program interrupt
(for a nonconstrained transaction, the address will be of the instruction
following the TBEGIN; for a constrained transaction, the address will
be of the TBEGINC instruction). Resume is done using these fields
whether or not bit EPIEPITX is on.
- When bit EPIEPITX is on, new field EPIETXG64 contains the registers
current when the program interrupt occurred.
- When bit EPIEPITX is on, new field EPIETXPSW16 contains the PSW
current when the program interrupt occurred.
Note: A SPIE exit routine will not get control
for a program interrupt during transactional execution.
For a recovery routine (whether FRR-type or ESTAE-type), there
will be additional information in the SDWA:
- Bits SDWAPTX1 (within byte SDWAIC1H in field SDWAAEC1) and SDWAPTX2
(within byte SDWAIC2H in field SDWAAEC2): The program interrupt occurred
while within transactional execution and therefore bit SDWAPTX1 is
valid only when bit SDWAPCHK is on.
- Existing fields SDWAG64, SDWAG64H, and SDWAGRSV contain the time
of error register information. These are the registers current when
the program interrupt occurred.
- Existing field SDWAPSW16 contains the time of error register information.
This is the PSW current when the program interrupt occurred.
- When bits SDWAPCHK and SDWAPTX2 are on, new field SDWATXG64 contains
the registers that resulted from the transaction abort due to the
program interrupt.
- When bits SDWAPCHK and SDWAPTX2 are on, new field SDWATXPSW16
contains the PSW that resulted from the transaction abort due to the
program interrupt.
The IEATXDC service is provided to help you test your applications.
A nonconstrained transaction has both a transactional path and a fallback
(non-transactional) path. With the IEATXDC service, you can request
random aborts of transactions for your work unit so that, upon repeated
runnings, you are likely to exercise both the non-abort and abort
paths.
Debugging of problems that might occur within transactional execution
mode can be much more difficult than others since any stores done
within the transaction have been rolled back by the time that the
system gets to examine the time of error data. SLIP provides some
help in this area:
The SLIP GTF record, at offset (decimal) 135, has a 1-byte count
that is the transactional execution DATA filter mismatch count.