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Extract stacked state (ESTA) instruction z/OS MVS Programming: Extended Addressability Guide SA23-1394-00 |
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A linkage stack entry includes the contents of the ARs and the GPRs, as well as other information. The EREG instruction copies the ARs and GPRs from the current entry; the ESTA instruction copies the rest of the information (that is, the non-register information) from the current entry. The non-register information is divided into four eight-byte information fields and is identified to the ESTA instruction by a code. Figure 1 shows the code for each of the four information
fields and the format of the fields. The format of the third field
varies depending on whether a BAKR or a stacking PC instruction caused
the entry.
Figure 1. Format
of the information fields
The ESTA instruction copies one of the fields in the current entry into an even/odd pair of GPRs. It returns a condition code that tells whether the entry on the linkage stack was formed by the BAKR (CC=0) or stacking PC (CC=1) instruction. In the following example, the load address instruction (LA) loads
a code of "1" into register 9, where "1" identifies the
information field that contains the PSW. The ESTA instruction then
copies this field into general registers 4 and 5. The BZ instruction
causes a branch if the stack entry was formed by a BAKR.
Figure 2. Example of an ESTA instruction
Another example of the ESTA instruction appears in Figure 1. |
Copyright IBM Corporation 1990, 2014
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