Description: In z/OS V2R1, z/OS CPU infrastructure supports
up to a maximum of 256 CPUs (CPU IDs 0-255). Earlier releases of z/OS
support up to 100 CPUs (CPU IDs 0-99). Components or products allocating
storage for CPU related arrays or bitmasks might require changes to
support the V2R1 CPU infrastructure.
Allocating CPU related arrays or bitmasks on a per CPU basis is
done using one of the following:
- Runtime fields in the z/OS CVT (mapped by CVT) and ECVT (mapped
by IHAECVT) control blocks representing the maximum CPU ID a z/OS
image can use for the life of the IPL. Products using runtime fields
do not require changes to support the V2R1 CPU infrastructure.
- Compile-time or assemble time constants in the z/OS ECVT control
block or within the product itself representing the maximum CPU ID
the z/OS CPU infrastructure supports. Products using compile-time
or assemble time constants need to recompile at a minimum, and might
require code changes to support the V2R1 CPU infrastructure.
All products running on z/OS V2R1 must prepare to support all
CPUs supported by the z/OS V2R1 CPU infrastructure (up to 256 CPUs
with CPU IDs 0-255). Products that support the z/OS V2R1 CPU infrastructure
will be able to run on earlier z/OS releases whose CPU infrastructure
supports a smaller number of CPUs.
Element or feature: |
BCP |
When change was introduced: |
z/OS V2R1. |
Applies to migration from: |
z/OS V1R13 and z/OS V1R12. |
Timing: |
Before
the first IPL of z/OS V2R1 |
Is the migration action required? |
Yes, for programs using local constants or the
z/OS constants for the number of CPUs the z/OS CPU infrastructure
supports at the current or a specific level of z/OS |
Target system hardware requirements: |
None. |
Target system software requirements: |
z/OS V2R1. |
Other system (coexistence or fallback) requirements: |
None. |
Restrictions: |
None. |
System impacts: |
Programs that do not support up to the maximum
number of CPUs the z/OS infrastructure supports might not be able
to work with all CPUs on the z/OS image. The system impacts are program
dependent. |
Related IBM Health Checker for z/OS check: |
None. |
Steps to take: Follow these steps:
- Scan your code for all of the constants in the ECVT control block
that have a prefix of ECVT_max_* or ECVT_zOSR11_*. These fields are
all related to the maximum CPU ID the current or a specific z/OS release
supports.
- Scan your code for compile-time or assemble-time constants in
your product for constants related to the maximum CPU ID that the
current or a specific z/OS release supports. Also scan your product
for constants related to the maximum number of CPUs the current or
a specific z/OS release supports.
If you use ECVT constants with a prefix of ECVT_max_* or ECVT_zOSR11_*
, the product will require the following changes:
- If the ECVT_zOSR11_highestCPUID or ECVT_max_highestCPUID constants
are in use:, consider upgrading your code to use the run-time field
CVTMAXMP (for allocating CPU related arrays) or ECVT_Installed_CPU_HWM
(for traversing CPU related arrays). •
- If ECVT compile-time or assemble-time constants with a prefix
of ECVT_max_* are in use, recompile/reassemble all appropriate parts
with the new z/OS V2R1 IHAECVT macro.
- If ECVT compile-time or assemble-time constants with a prefix
of ECVT_zOSR11_* are in use, consider converting constants with a
prefix of ECVT_zOSR11_* to the ECVT_max_* analog. Otherwise change
ECVT_zOSR11_* to the new ECVT_zOSV2R1 analog.
If your code has its own local declares for compile-time or assembler-time
constants, update your code to use the z/OS run-time fields or the
z/OS compile-time or assemble-time constants. Do the following:
- Allocate CPU bit masks at compile-time or assemble-time using
ECVT_max_CPUMaskSizeInBits or ECVT_max_CPUMaskSizeInBytes.
- Convert to using run-time fields like CVTMAXMP to allocate your
local CPU related arrays. If using run-time fields is undesirable,
allocate CPU arrays using the compile-time or assemble time constants
ECVT_max_* or ECVT_zOSV2R1_* fields
Reference information: z/OS V2R1 MVS Data Areas Volume 2 (DDRCOM -IEFALCXT).