The CASE macro set

The CASE macro set selects one of a set of functions for execution, depending on the value of an integer found in a specified register. The determination of which of the functions is to be executed involves the use of either an address vector (sequence of addresses) or a branch vector (sequence of branch instructions).

The flowchart for the CASE program figure is:

                   ↓
              ┌────┴────┐
              │         │
              │ IF(i)   │
              │         │
              └────┬────┘
                   ↓          ┌─────┐
                   │i=1       │     │
                   ├─────→────┤ F1  ├─→───┐
                   │          │     │     │
                   │          └─────┘     │
                   ↓                      │
                   │          ┌─────┐     │
                   │i=2       │     │     │
                   ├─────→────┤ F2  ├─→───┼───→
                   │          │     │     │
                   │          └─────┘     │
                   ↓                      │
                   │          ┌─────┐     │
                   │i=m       │     │     │
                   └─────→────┤ Fm  ├─→───┘
                              │     │
                              └─────┘

The macro is written like this:

        CASENTRY  Rx,POWER=n,VECTOR=listtype
          CASE  a,d
            Code for F1
          CASE  b,c
            Code for F2
          CASE  f
            Code for F3
            .
            .
            .
          CASE  t
            Code for Fm
        ENDCASE

Notes:

listtype can be either B or BR.
Statements between the CASENTRY macro and the first CASE statement are assembled, but not executed. Statements should not be placed between CASENTRY and CASE.
An integer cannot be used more than once in a CASENTRY structure.

Where the case numbers a, b, …, t are either members of a set of integers greater than zero, or nonzero multiples of a power of 2 (for example, 4, 12, and 16). Zero (0) is not a valid case number. Rx is a positional operand that specifies a general register containing the case number. The keyword operands POWER and VECTOR are optional.

The operand POWER=n (where n is an integer) refers to a power of 2 and indicates that the case numbers are multiples of that power of 2. Thus, POWER=3 indicates that the case numbers are multiples of 8.

The default value for POWER is 0 which indicates that the case numbers are positive integers that are necessarily powers of 2.

The operand VECTOR=B or VECTOR=BR indicates that a branch vector is to be generated rather than an address vector. Fewer instructions are generated for branch vectors. However, you must be sure that the branch vector table is addressable by the initialization code, that the code for each of the cases is addressable, and that the code after the ENDCASE macro is addressable by a current base register. If branch relative instructions are being used, then the CASENTRY macro will ignore the VECTOR keyword, will always generate a branch table, and may use register 0 in the generated code.

It is your responsibility to load the desired case number into Rx and to ensure that it is within the indicated range. The macro expansion then adjusts this value according to the POWER value (whether explicitly or implicitly specified), so that the correct CASE is selected. The content of the register indicated in the CASENTRY statement is destroyed and is only required during the execution of the initial code generated by the macro expansion. Hence, it is possible to use the same register for other purposes within the function code for any CASEs.

This example of a CASE macro uses case numbers 1, 2, 3, 4, and 5:

        CASENTRY  Rx
          CASE 2,1,4
            Code for F1
          CASE 5
            Code for F2
        ENDCASE

This is interpreted to mean that if a 1, 2, or 4 is present in general register Rx, the code for F1 is executed. If a 5 is present, the code for F2 is executed. If a value of 3 is in Rx, no function code is to be executed. In all cases, control is then to be passed to the code after the ENDCASE macro.

The example produces:

 Rx       equ   3
          CASENTRY  RX
+         SLA   RX,2-0
+         A     RX,#@LB3
+         L     RX,0(,RX)
+         BCR   15,RX

+#@LB3    DC    A(#@LB1)
            CASE  2,1,4
+#@LB4    DC    0H
 *            code for F1
            CASE  5
+         L     RX,#@LB1
+         BCR   15,RX
+#@LB5    DC    0H
 *            code for F2
          ENDCASE
+         L     RX,#@LB1
+         BCR   15,RX
+#@LB1    DC    A(#@LB2)
+         DC    A(#@LB4)
+         DC    A(#@LB4)
+         DC    A(#@LB2)
+         DC    A(#@LB4)
+         DC    A(#@LB5)
+#@LB2    DC    0H

This example shows a CASE macro using a branch vector and case number that are multiples of 8:

        CASENTRY  Rx,POWER=3,VECTOR=B
          CASE 8,24
            Code for F1
          CASE  16,32
            Code for F2
        ENDCASE

The example produces:

 Rx       equ   3
          CASENTRY  Rx,POWER=3,VECTOR=B
+         SRA   Rx,3-2
+         BC    15,#@LB1(Rx)
            CASE  8,24
+#@LB3    DC    0H
 *            code for F1
            CASE  16,32
+         BC    15,#@LB2
+#@LB4    DC    0H
 *            code for F2
          ENDCASE
+#@LB1    BC    15,#@LB2
+         BC    15,#@LB3
+         BC    15,#@LB4
+         BC    15,#@LB3
+         BC    15,#@LB4
+#@LB2    DC    0H

The next example shows the use of register 0 and the BRAS instruction when ASMMREL ON is in effect. Also, the macros have a branch table generated by default.

 rx       equ   3
          ASMMREL ON
          CASENTRY  Rx,POWER=3
+         SRA   Rx,3-2
+         LR    0,Rx
+         CNOP  0,4
+         BRAS  Rx,*+8
+         DC    A(#@LB1-*)
+         AL    Rx,0(Rx,0)
+         ALR   Rx,0
+         BR    Rx
            CASE  8,24
+#@LB3    DC    0H
 *            code for F1
            CASE  16,32
+         BRC   15,#@LB2
+#@LB4    DC    0H
 *            code for F2
          ENDCASE
+#@LB1    BRC   15,#@LB2
+         BRC   15,#@LB3
+         BRC   15,#@LB4
+         BRC   15,#@LB3
+         BRC   15,#@LB4
+#@LB2    DC    0H

The next example shows the use of LARL when both ASMMREL and SYSSTATE ARCHLVL=2 are in effect.

 rx       equ   3
          SYSSTATE ARCHLVL=2
+*        THE VALUE OF SYSSTATE IS NOW SET TO ASCENV=P AMODE64=NO ARCHLVX
+               L=2
          ASMMREL ON
          CASENTRY  Rx,POWER=3
+         SRA   Rx,3-2
+         LARL  0,#@LB1
+         ALR   Rx,0
+         BR    Rx
            CASE  8,24
+#@LB3    DC    0H
 *            code for F1
            CASE  16,32
+         BRC   15,#@LB2
+#@LB4    DC    0H
 *            code for F2
          ENDCASE
+#@LB1    BRC   15,#@LB2
+         BRC   15,#@LB3
+         BRC   15,#@LB4
+         BRC   15,#@LB3
+         BRC   15,#@LB4
+#@LB2    DC    0H