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SS format HLASM Language Reference SC26-4940-06 |
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The operand fields and subfields of SS-format instructions designate
two virtual storage addresses (coded as implicit addresses or explicit
addresses) and, optionally, the explicit data lengths you want to
include. However, in the Shift and Round Decimal (SRP) instruction,
a 4 bit immediate data field (see the operand 3 in
the example of an SRP instruction), with a value 0 - 9, is specified
as a third operand.
Symbols used to represent base registers (see BASE8 and BASE7 in the instruction labeled ALPHA2 in the examples) in explicit addresses are assumed to be equated to absolute values 0 - 15. Symbols used to represent explicit lengths (see NINE and SIX in the instruction labeled ALPHA2 in the examples) are assumed to be equated to absolute values 0 - 256 for SS-format instructions with one length specification, and 0 - 16 for SS-format instructions with two length specifications. Symbols used to represent implicit addresses (see FIELD1 and FIELD2 in the instruction labeled ALPHA3, and FIELD1,X'8' in the SRP instructions in the examples) can be either relocatable or absolute. Symbols used to represent displacements (see DISP40 and DISP30 in the instruction labeled ALPHA5 in the examples) in explicit addresses are assumed to be equated to absolute values 0 - 4095. See topic Lengths for more information about the lengths of SS-format instructions. Examples:
When assembled, the object code for the instruction labeled ALPHA1, in hexadecimal, is:
where:
When assembled, the object code for the instruction labeled BETA1, in hexadecimal, is:
where:
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