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A Double-Precision Multiplier with Fine-Grained Clock-Gating Support for a First-Generation Cell Processor
Related links: Cell Broadband Engine

Article
This ISSCC paper describes a Double-Precision Multiplier for a First-Generation Cell Processor.

Revision Date: 03/10/05

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ISSCC-20.3-Cell_Mult.pdfPDF2.4 MBytes
 

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