IBM®
Skip to main content
    Country/region [select]      Terms of use
 
 
   
     Home      Products      Services & solutions      Support & downloads      My account     
Optimizing PowerPC 440 and PowerPC 464 Memory Copy Routines
Related links: PowerPC 440 Embedded Core, PowerPC 460S Embedded Core, PowerPC 464 H90 Embedded Core, PowerPC 464FP H65 Embedded Core, PowerPC 464FP H90 Embedded Core

Application Note
As part of an embedded system, the PowerPC 440 and PowerPC 464 CPU cores often copy large amounts of data from one location in the system memory to another. The amount of data copied can exceed the size of both the L1 and L2 data caches. In order to improve the memory copy performance, software copying routines can be written and tuned to take advantage of the data cache management instructions and the hardware data cache line fill data buffers (DCLFD) and the load miss queue (LMQ) available in these CPUs. This application note describes these instructions and data cache resources and provides an example of an optimized memory copy routine.

Revision Date: 01/18/08

LinkFile typeSize
440memcopy.pdfPDF63KB
 

IBM Customer Connect
Sign in  

IBM microNews
  Feedback
Questions or comments on the technical library
  Help
Information on search and navigation

    About IBM Privacy Contact