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PowerPC 476FP Embedded Core
Related links: PowerPC Cores

Abstract (text)

Implemented in IBM CMOS Silicon-on-Insulator 45 nm technology, the IBM PowerPC 476FP is a 32-bit superscalar processor core with an integrated double-precision floating-point unit and coherency-enabled L1 caches. The PowerPC 476FP is fully compliant with the flexible and scalable Power Instruction Set Architecture (ISA), version 2.05.

The PowerPC 476FP core contains five 5-issue, 9-stage execution pipelines and two floating-point pipelines. Memory management is optimized for multitasking embedded environments and symmetric multiprocessor systems. Additional functions include cache control, power control, timers, and debug facilities. Companion cores include an L2 cache controller that supports memory coherency, a processor local bus controller that supports coherent and non-coherent functional blocks, and a DDR3 memory controller with coherency support.

The PowerPC 476FP core offers an ideal solution for a range of applications from digital TVs to highly parallel, high-performance computers.

For more information on PowerPC licensing, click here.

(Click on column header to sort)
iDocumentsTypeDate
(mm/dd/yy)
IBM PowerPC 476FP Embedded Processor CoreProduct Brief08/02/10
IBM PowerPC 476FP L2 Cache CoreProduct Brief09/15/09
Multiprocessor Interrupt Controller (MPIC)Product Overview03/02/06
Introduction to the IBM PowerPC 476FP Embedded Processor CoreWhite Paper04/07/11
PowerPC 476FP L2 Cache Core DatabookDatabook11/08/11
Multiprocessor Interrupt Controller Data BookDatabook05/16/11
PowerPC 476FP Embedded Processor Core User's ManualUser Guide02/28/14
PowerPC 476FP and PLB6 Caching and Coherency GuidelinesApplication Note04/26/13
Debugging Multiple PowerPC 476FP Cores with the JTAG TAP ControllerApplication Note09/26/12
JTAG TAP Controller with PowerPC 4xx CoresApplication Note09/26/12
PowerPC 476FP and PLB6: Architectural Requirements and Constraints Regarding Coherency and Caching for Memory SlavesApplication Note10/14/11
IBM PowerPC 476FP Instruction and Logic TraceApplication Note09/22/11
IBM PowerPC 46x and PowerPC 47x Feature Differences Application NoteApplication Note05/04/11
PowerPC 476FP, L2 Cache Controller, and PLB6 Arbiter Signal Connections Application NoteApplication Note01/25/11
PowerPC 470S and 476FP Technical OverviewPresentation02/15/11

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