Floating-point compare instructions
The Floating-point compare instructions perform ordered and unordered comparisons of the contents of two FPRs.
Floating-point compare instructions perform ordered and unordered comparisons of the contents of two FPRs. The CR field specified by the BF field is set based on the result of the comparison. The comparison sets one bit of the designated CR field to 1, and sets all other bits to 0. The Floating-Point Condition Code (FPCC) (bits 16:19) is set in the same manner.
The CR field and the FPCC are interpreted as follows:
| Item | Description | Description |
|---|---|---|
| Condition-Register Field and Floating-Point Condition Code Interpretation | Condition-Register Field and Floating-Point Condition Code Interpretation | Condition-Register Field and Floating-Point Condition Code Interpretation |
| Bit | Name | Description |
| 0 | FL | (FRA) < (FRB) |
| 1 | FG | (FRA) > (FRB) |
| 2 | FE | (FRA) = (FRB) |
| 3 | FU | (FRA) ? (FRB) (unordered) |