Enablement step

Enablement refers to the determination that an exception should be processed as a condition. The enablement step begins at the time an exception occurs in your application. In general, you are not involved with the enablement step; Language Environment determines which exceptions should be enabled (treated as conditions) and which should be ignored, based on the languages currently active on the stack. If you do not specify explicitly or as a default any of the services or constructs discussed later in this section, the default enablement of your HLL applies.

If Language Environment ignores an exception, the exception is not seen as a condition and does not undergo condition handling. Processing resumes at the next sequential instruction.

You can affect the enablement of exceptions in the following ways:

Set the TRAP runtime option to handle or ignore abends and program checks.
See TRAP effects on the condition handling process for more information.
Specify in the assembler user exit or ABPERC runtime option an abend code or list of codes to be percolated (passed to the operating system).
See Language Environment abends and the enablement step for more information.
Disable specific conditions by doing one of the following:
- Code a construct such as signal(sigfpe, SIG_IGN) in a C/C++ function or a PL/I NOZERODIVIDE prefix in a PL/I procedure to request that program checks (in this case divide-by-zero) be ignored if they occur in either routine. Execution continues at the next sequential instruction after the one that caused the divide-by-zero. Condition handlers never get a chance to handle the program check because it is not considered a condition.
- Call the CEE3SPM callable service or use the XUFLOW runtime option to disable hardware conditions.
  See Using CEE3SPM and XUFLOW to enable and disable hardware conditions for more information.

In summary, not all hardware interrupts, software conditions, or user-signaled events become conditions. Those that are not ignored and do become conditions enter the condition step. See Condition step for the details of what takes place during the condition step.