Analyzing a disabled wait

A disabled wait condition can be analyzed by checking the PSW at the time of the error. If bits 6 and 7 are zero and bit 14 contains a 1, there is a disabled wait. The wait state code is in byte 7, with the reason code in byte 5.

The following examples show how to determine the wait state code:

After you determine the wait state code from the PSW, look at the documentation for the specific wait state code for any action you can take. See z/OS MVS System Codes for the specific wait state code you encountered.

If you cannot find the wait state code documented, do one of the following: