Where text is:

{SYSTEM|USER} COMPLETION CODE=cde [REASON CODE=reason-code]
TIME=hh.mm.ss SEQ=sssss CPU=cccc ASID=asid
{PSW AT TIME OF ERROR xxxxxxxx xxxxxxxx ILC x INTC xx | 
 PSW AT TIME OF ERROR xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
 ILC x INTC xx}
{ACTIVE LOAD MODULE  ADDRESS=aaaaaaaa OFFSET=nnnnnnnn |
NO ACTIVE MODULE FOUND}
{NAME=load-module-name|NAME=UNKNOWN}
{DATA AT PSW hhhhhhhh - dddddddd dddddddd dddddddd |
DATA AT PSW IS INACCESSIBLE BY USER |
DATA AT PSW IS UNAVAILABLE AT THIS TIME}
 
registers
 
END OF SYMPTOM DUMP

If you want to suppress this message on your system, do one of the following:

• Use the message processing facility (MPF)
• Stop the system from generating symptom dumps by adding the SDATA=NOSYM option to the SYSABEND, SYSUDUMP, or SYSMDUMP dump options. You can specify the SDATA=NOSYM dump option in the following ways:
  • Use the CHNGDUMP command from an operator console.
  • Specify NOSYM in the IEAABD00, IEADMP00, and IEADMR00 parmlib members.

In the message text:

SYSTEM COMPLETION CODE=cde

The system completion code from the ABEND macro.

USER COMPLETION CODE=cde

The user completion code from the ABEND macro.

REASON CODE=reason-code

The reason code, if specified in the ABEND macro.

TIME=hh.mm.ss

The time that the dump was written in hours (00 through 23), in minutes (00 through 59), and in seconds (00 through 59).

SEQ=sssss

Sequence number for the dump.

CPU=cccc

The central processor identifier. If cccc is 0000, the system did not determine on which processor the abend occurred.

ASID=asid

The address space identifier (ASID) of the failing task.

PSW AT TIME OF ERROR xxxxxxxx xxxxxxxx ILC x INTC xx

- OR -

PSW AT TIME OF ERROR xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx ILC x INTC xx

The 16-byte program status word (PSW) at the time of the restart interruption. The format of the PSW may appear on one or two lines. If the error address is located below 2G, the information appears on one line; if the error address is located above 2G, the PSW information appears on two lines.

ILC x

Instruction length code for the failing instruction.

INTC xx

Interrupt code for the failing instruction.

ACTIVE LOAD MODULE

ADDRESS=aaaaaaaa

Address of the load module, if the PSW points to one of the following:

• A module running under the current task
• A module loaded by the current task.

NAME=load-module-name

Load module name, if the PSW points to an active load module.

NAME=UNKNOWN

The system cannot ascertain the load module name because the PSW does not point to an active load module.

OFFSET=nnnnnnnn

Offset into the load module of the failing instruction, if the PSW points to an active load module.

DATA AT PSW hhhhhhhh - dddddddd dddddddd dddddddd

Address in the PSW minus six, followed by the contents of the three words beginning at the address in hhhhhhhh.

registers

The content of the general purpose registers at the time of error. If the PSW at the time of error is in AR ASC mode, the access registers will appear. For a detailed description of the registers displayed, see the following explanations.

Case 1: The system is running in ESA/390 mode (or z/Architecture mode when all the high halves of the GPRs are zero) and all ARs are zero:

GR 0: gggggggg  1: gggggggg
   2: gggggggg  3: gggggggg
   4: gggggggg  5: gggggggg
   6: gggggggg  7: gggggggg
   8: gggggggg  9: gggggggg
   A: gggggggg  B: gggggggg
   C: gggggggg  D: gggggggg
   E: gggggggg  F: gggggggg

Case 2: The system is running in ESA/390 mode (or z/Architecture mode when all the high halves of the GPRs are zero) and not all ARs are zero:

AR/GR 0: aaaaaaaa/gggggggg  1: aaaaaaaa/gggggggg
      2: aaaaaaaa/gggggggg  3: aaaaaaaa/gggggggg
      4: aaaaaaaa/gggggggg  5: aaaaaaaa/gggggggg
      6: aaaaaaaa/gggggggg  7: aaaaaaaa/gggggggg
      8: aaaaaaaa/gggggggg  9: aaaaaaaa/gggggggg
      A: aaaaaaaa/gggggggg  B: aaaaaaaa/gggggggg
      C: aaaaaaaa/gggggggg  D: aaaaaaaa/gggggggg
      E: aaaaaaaa/gggggggg  F: aaaaaaaa/gggggggg

Case 3: The system is running in z/Architecture mode, the high halves of the GPRs are not all zero, and and all ARs are zero:

GR 0: gggggggg_gggggggg  1: gggggggg_gggggggg
   2: gggggggg_gggggggg  3: gggggggg_gggggggg
   4: gggggggg_gggggggg  5: gggggggg_gggggggg
   6: gggggggg_gggggggg  7: gggggggg_gggggggg
   8: gggggggg_gggggggg  9: gggggggg_gggggggg
   A: gggggggg_gggggggg  B: gggggggg_gggggggg
   C: gggggggg_gggggggg  D: gggggggg_gggggggg
   E: gggggggg_gggggggg  F: gggggggg_gggggggg

Case 4: The system is running in z/Architecture mode, the high halves of the GPRs are not all zero, and the ARs are not all zero:

AR/GR 0: aaaaaaaa/gggggggg_gggggggg  1: aaaaaaaa/gggggggg_gggggggg
      2: aaaaaaaa/gggggggg_gggggggg  3: aaaaaaaa/gggggggg_gggggggg
      4: aaaaaaaa/gggggggg_gggggggg  5: aaaaaaaa/gggggggg_gggggggg
      6: aaaaaaaa/gggggggg_gggggggg  7: aaaaaaaa/gggggggg_gggggggg
      8: aaaaaaaa/gggggggg_gggggggg  9: aaaaaaaa/gggggggg_gggggggg
      A: aaaaaaaa/gggggggg_gggggggg  B: aaaaaaaa/gggggggg_gggggggg
      C: aaaaaaaa/gggggggg_gggggggg  D: aaaaaaaa/gggggggg_gggggggg
      E: aaaaaaaa/gggggggg_gggggggg  F: aaaaaaaa/gggggggg_gggggggg