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Pitfalls to avoid z/OS MVS Programming: Extended Addressability Guide SA23-1394-00 |
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As you begin to use the 64-bit instructions, consider the following:
Consider the following example, where a 31-bit subtraction instruction
has left a 31-bit negative integer in bits 32 through 63 of GPR3 and
has left the high-order half unchanged.
Next, the instruction AG R3,MYDOUBLEWORD, mentioned earlier, adds the doubleword at the location MYDOUBLEWORD to the contents of the GPR3 and places the sum at GPR3. Because the high-order half of the GPR has uncertain contents, the result of the AG instruction is incorrect. To change the value in the GPR3 so that the AG instruction adds the correct integers, before you use the AG instruction, use the Load G Fullword Register (LGFR) instruction to propagate the sign to the high-order half of GPR3. |
Copyright IBM Corporation 1990, 2014
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