z/OS MVS Programming: Extended Addressability Guide
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How z/Architecture processes S/390 instructions

z/OS MVS Programming: Extended Addressability Guide
SA23-1394-00

First of all, your existing programs work, unchanged, in z/Architecture® mode. This section describes how z/Architecture processes S/390® instructions. The best way to describe this processing is through examples of common S/390 instructions. First, consider a simple Add instruction: A R3,NUM31. This instruction takes the value of a fullword binary integer at location NUM31 and adds it to the contents of the low-order half of GPR3, placing the sum in the low-order half of GPR3. The high-order half of GPR3 is unchanged.
ieaa500a
Second, consider the LOAD instruction: L R3,MYDATA. This instruction takes the 4 bytes of data at location MYDATA and puts them into the low order bits of GPR3.
ieaa500b

The high-order half is not changed by the ADD instruction or the LOAD instruction. The register forms of these instructions (AR and LR) work similarly, as do Add Logical instructions (AL and ALR).

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