Use the POST macro to set a specified event control block (ECB) to indicate the occurrence of an event. If this event satisfies the requirements of an outstanding WAIT or EVENTS macro, the waiting task is taken out of the wait state and dispatched according to its priority.
The POST macro is also described in z/OS MVS Programming: Assembler Services Reference IAR-XCT with the exception of the parameters ASCB, ERRET, ECBKEY, and LINKAGE=BRANCH. For further information on how to use POST to serialize parallel tasks, see z/OS MVS Programming: Authorized Assembler Services Guide.
The requirements for callers of POST with LINKAGE=SVC are:
Environmental factor | Requirement |
---|---|
Minimum authorization: | Problem state with any PSW key. For the ASCB,
ERRET, and ECBKEY parameters, one or more of the following:
|
Dispatchable unit mode: | Task |
Cross memory mode: | PASN=HASN=SASN |
AMODE: | 24- or 31- or 64-bit |
ASC mode: | Primary |
Interrupt status: | Enabled for I/O and external interrupts |
Locks: | No locks held |
Control parameters: | If the caller specifies the ASCB parameter, the event control block (ECB) must be addressable from the address space identified by the ASCB parameter. If the caller does not specify the ASCB parameter, the ECB must be in the home address space. |
The requirements for callers of POST with LINKAGE=SYSTEM are:
Environmental factor | Requirement |
---|---|
Minimum authorization: | Problem state with any PSW key. For the ASCB,
ERRET, and ECBKEY parameters, one or more of the following:
|
Dispatchable unit mode: | Task or SRB |
Cross memory mode: | Any PASN, any HASN, any SASN |
AMODE: | 24- or 31- or 64-bit |
ASC mode: | Primary |
Interrupt status: | Enabled for I/O and external interrupts |
Locks: | No locks held |
Control parameters: | If the caller specifies the ASCB parameter, the event control block (ECB) must be addressable from the address space identified by the ASCB parameter. If the caller does not specify the ASCB parameter, the ECB must be in the caller's primary address space. |
The requirements for callers of POST with LINKAGE=BRANCH are:
Environmental factor | Requirement |
---|---|
Minimum authorization: | Supervisor state and PSW key 0 |
Dispatchable unit mode: | Task or SRB |
Cross memory mode: |
|
AMODE: | 24- or 31-bit |
ASC mode: | Primary or secondary |
Interrupt status: | Enabled or disabled for I/O and external interrupts |
Locks: | The caller must hold the local lock, unless the caller specifies the ASCB parameter, in which case the local lock can be held but is not required. |
Control parameters: | If the caller specifies the ASCB parameter, the event control block (ECB) must be addressable from the address space identified by the ASCB parameter. If the caller does not specify the ASCB parameter, the ECB must be in the home address space. |
For LINKAGE=BRANCH or BRANCH=YES, the caller must include the CVT mapping macro.
Callers that specify LINKAGE=SVC cannot have any enabled unlocked task (EUT) functional recovery routines (FRR) established.
Before issuing the POST macro, the caller does not have to place any information into any register unless using it in register notation for a particular parameter, or using it as a base register.
Some callers depend on register contents remaining the same before and after issuing a service. If the system changes the contents of registers on which the caller depends, the caller must save them before issuing the service and restore them after the system returns control.
None.
The standard form of the POST macro is written as follows:
Syntax | Description |
---|---|
name | name: Symbol. Begin name in column 1. |
␣ | One or more blanks must precede POST. |
POST | |
␣ | One or more blanks must follow POST. |
ecb addr | ecb addr: RX-type address, or register (2) - (12), except (10). |
,comp code | comp code: Symbol, decimal or hexadecimal digit, or register (0), (2) - (9), (10), or (12). |
Range of values: 0 to (230 − 1) |
|
,ASCB=addr,ERRET=err rtn | |
,ASCB=addr,ERRET=err rtn,ECBKEY=key | |
addr: RX-type address, or register (2) - (9), (12). | |
: RX-type address, or address in register (2) - (9), (12). | |
key: Symbol, decimal or hexadecimal digit, or register (2) - (9), (12). | |
Range of values: 0 - 15 (decimal), Default:
None. Note: If the register form is specified, bits 24-27 of the register must contain the key. |
|
,LINKAGE=SVC | Default: LINKAGE=SVC |
,LINKAGE=BRANCH | |
,LINKAGE=BRANCH, | |
ECBKEY=key | key: Symbol, decimal or hexadecimal digit, or register (2) - (9), (12). |
Range of values: 0 - 15 (decimal), Default: None.Note: If the register form is specified, bits 24-27 of the register must contain the key. | |
,LINKAGE=SYSTEM | |
,LINKAGE=SYSTEM, | |
ERRET=err rtn | : RX-type address, or address in register (2) - (9), (12). |
,BRANCH=NO | Default: BRANCH=NO |
,BRANCH=YES | |
,MEMREL=YES | Default: MEMREL=YES |
,MEMREL=NO | Note: MEMREL can be coded only if LINKAGE=BRANCH and the ASCB and ERRET parameters are coded. |
,RELATED=value | value: Any valid macro keyword specification. |
The explanation of the parameters is as follows:
The ERRET routine is further described in Asynchronous Cross Memory POST in z/OS MVS Programming: Authorized Assembler Services Guide.
For LINKAGE=SVC, the linkage is through an SVC instruction. This linkage is valid only when the caller is in task mode and primary ASC mode, where primary, home, and secondary are the same address space. For SVC callers, registers 2-14 are preserved.
With LINKAGE=BRANCH, you can also specify the storage protection key of the ECB to be posted using the ECBKEY parameter. The system checks the storage key of the ECB against the ECBKEY before posting it.
LINKAGE=SYSTEM without the ASCB parameter is intended to be used by programs in cross memory mode.
These hexadecimal codes are described in z/OS MVS System Codes.
When you issue LINKAGE=SYSTEM, the POST macro service issues the following hexadecimal return codes.
Return Code | Meaning and Action |
---|---|
00 | Meaning: Indicates a synchronous POST was
done, as requested. Action: None. |
04 | Meaning: Environmental error. Indicates
an asynchronous POST is in progress. If you specified ERRET and a
failure occurs before the POST completes, the error routine that you
specified will receive control. If you did not specify ERRET and a
failure occurs before the POST completes, no error routine exists
to receive control. Action: None required. However, you might take some action based upon your application. |
08 | Meaning: Environmental error. Indicates
an asynchronous POST is in progress. You specified ERRET; however,
if an error occurs before POST completes, the error routine that you
specified will not receive control. Action: None required. However, you might take some action based upon your application. |
POST ECB,ASCB=(REG5),ERRET=ERRRTN
POST ECB,X'3FF',ASCB=(REG5),ERRET=ERRRTN
POST ECB,LINKAGE=SYSTEM,ECBKEY=0,ASCB=(REG5),ERRET=(REG3)