A fix is available
APAR status
Closed as program error.
Error description
Multiple 0C4 abends and random overlays of EXCI control blocks occur when field TRA_AVLEN has been corrupted within the EXCI trace anchor block. At CICS/TS 4.2 code has been changed to use 64 bit registers. The corruption of TRA_AVLEN happens when a new trace block is acquired and the first 4 bytes of 64 bit register 9 is not clean on entry to DFHXCTRP. Additional Symptom(s) Search Keyword(s): KIXREVDAM VERBX LEDATA: 15 +000036E6 DFHXCPRX 16 ....*DFHXCPRH....0670I....HCI6700 .-CICS 5655-S97 +00004896 DFHXCPRX 17 baseEXCIPipeOperation +00000242 *PATHNAM 18 openEXCIPipe+00000084 *PATHNAM 21 MVS_CcicsECI+0000051E *PATHNAM 22 Java_com_ibm_ctg_server_ServerECIRequest_CcicsECI ... java code occurs here in stack ... Javacore: com/ibm/ctg/server/ServerECIRequest.CcicsECI(Native Method) com/ibm/ctg/server/ServerECIRequest.executeECINative com/ibm/ctg/server/ServerECIRequest.executeECI com/ibm/ctg/server/ServerECIRequest.execute com/ibm/ctg/client/LocalWorker.execute . Customers may also see the following messages when attempting to make an EXCI call to a CICS region that is unavailable: DFHEX0114 Incorrect data has been passed for EXCI tracing causing a program check in DFHXCTRP. DFHEX0001 An abend (code 0C4/----) has occurred in module DFHXCTRP. MSGDFHEX0114 MSGDFHEX0001 ABEND0C4 ABENDS0C4 ABEND0C4 in DFHXCTRP + x'420' 0C4-11 abend in CSQADELT due to BLOA being overlaid. It's storage happened to follow EXCI trace control blocks.
Local fix
Local Fix Use CICS/TS 4.1 code within the SDFHEXCI library
Problem summary
**************************************************************** * USERS AFFECTED: All CICS users. * **************************************************************** * PROBLEM DESCRIPTION: Program check (x'0c4') is reported in * * DFHXCTRP while moving trace data from * * DFHXCPRH to last trace block. * **************************************************************** * RECOMMENDATION: * **************************************************************** DFHXCTRP was changed at CICS/TS 4.2 to support 64 bit mode although it still run in 31 bit mode. TRA_NAB and TRA_AVLEN are defined as 64 bit value marking the next byte address and left space in internal trace block. When one block is full and the other block is needed, NEW_BLOCK is invoked to address the new block. R8 and R9 are used in that routine to set new value of TRA_NAB and TRA_AVLEN. Load Address (LA) is used in update the only last 4 bytes of register and eventually the value in R8 and R9 are restored to TRA_NAB and TRA_AVLEN. Most of the time it is OK but when it happens that the top 4 bytes of R9, is not x'00000000', TRA_AVLEN will be updated with a large value , like x'0000000B FFF94C62'. The trace entry is written into the new block until the trace block is full. DFHXCTRP check TRA_AVLEN to see if there is enough space for new trace entry. Because TRA_AVLEN is very large, trace entry writing will continue until access the invalid address. Additional Keywords: S0C4 ABEND0C4
Problem conclusion
DFHXCTRP is changed to clear R8 and R9.
Temporary fix
FIX AVAILABLE BY PTF ONLY
Comments
APAR Information
APAR number
PM65749
Reported component name
CICS TS Z/OS V4
Reported component ID
5655S9700
Reported release
700
Status
CLOSED PER
PE
NoPE
HIPER
YesHIPER
Special Attention
NoSpecatt
Submitted date
2012-05-29
Closed date
2012-07-10
Last modified date
2015-06-23
APAR is sysrouted FROM one or more of the following:
APAR is sysrouted TO one or more of the following:
UK80223
Modules/Macros
DFHXCTRP
Fix information
Fixed component name
CICS TS Z/OS V4
Fixed component ID
5655S9700
Applicable component levels
R700 PSY UK80223
UP12/07/21 P F207
Fix is available
Select the PTF appropriate for your component level. You will be required to sign in. Distribution on physical media is not available in all countries.
[{"Business Unit":{"code":"BU058","label":"IBM Infrastructure w\/TPS"},"Product":{"code":"SSGMGV","label":"CICS Transaction Server"},"Component":"","ARM Category":[],"Platform":[{"code":"PF025","label":"Platform Independent"}],"Version":"4.2","Edition":"","Line of Business":{"code":"LOB35","label":"Mainframe SW"}},{"Business Unit":{"code":"BU054","label":"Systems w\/TPS"},"Product":{"code":"SG19M","label":"APARs - z\/OS environment"},"Component":"","ARM Category":[],"Platform":[{"code":"PF025","label":"Platform Independent"}],"Version":"4.2","Edition":"","Line of Business":{"code":"","label":""}}]
Document Information
Modified date:
23 June 2015