A fix is available
APAR status
Closed as program error.
Error description
IDF: STMTSTEP through LRL instruction corrupts register display . Problem description Hi... LRL is another instruction that doesn't work under STMTSTEP through IDF. It corrupts the target register. Then, because IDF uses the displayed values in the registers, the execution that follows the LRL is incorrect. Here's some sample code to illustrate the point: TITLE 'DEMO OF IDF BUG' MYPROG CSECT * STM 14,12,12(13) BASR 11,0 AHI 11,-6 USING MYPROG,11 * * TO REPRODUCE THIS PROBLEM: * * ISSUE THE REGS COMMAND TO DISPLAY THE REGISTERS. * STMTSTEP FROM THE LRL TO THE NOPR. R3 DISPLAYS * INCORRECTLY AS X'0A610001', INSTEAD OF X'00000001'. * (X'0A61' IS SVC 97. NOT A COINCIDENCE, I ASSUME!) * ADDITIONALLY, THE LR INSTRUCTION CAUSES R2 TO * CONTAIN THE WRONG VALUE (BECAUSE R3 CONTAINS THE * WRONG VALUE). * * HOWEVER, IF YOU SET A *BREAKPOINT* ON THE NOPR * INSTRUCTION AND THEN ISSUE A RUN COMMAND (INSTEAD * OF DOING A STMTSTEP THROUGH THE LRL INSTRUCTION), * THEN BOTH R3 AND R2 ARE CORRECT. * LRL 3,=F'1' LR 2,3 * NOPR 0 * LM 14,12,12(13) SR 15,15 BR 14 * FULLWORD DC F'1' * END
Local fix
None at this time...
Problem summary
**************************************************************** * USERS AFFECTED: Users of ASMIDF from High Level Assembler * * Toolkit feature for z/OS, z/VM and z/VSE * **************************************************************** * PROBLEM DESCRIPTION: ASMIDF processing of LRL and other * * non-branch instructions with relative * * long operands is incorrect in step * * mode, because the referenced data is * * overlaid with a breakpoint. * **************************************************************** * RECOMMENDATION: * **************************************************************** ASMIDF assumed for historical reasons that a relative operand was always a branch target, so for execution in step mode it always set a breakpoint at the operand address. The code was then enhanced for z/Architecture to recognize that LARL and EXRL were not branches, but many additional non-branch relative instructions were added later to z/Architecture, such as LRL. ASMIDF incorrectly treated these as possible branches as well, so it set a breakpoint at the operand address, which overwrote the data to be referenced by the instruction. Before checking operands, ASMIDF should check whether the instruction is a branch, as there is no need to set additional breakpoints for other types of instruction.
Problem conclusion
ASMIDF now checks the instruction type flags to determine whether the instruction is a branch, so that non-branch relative long instructions will function correctly in step mode. This includes the following instructions: CGFRL, CGHRL, CGRL, CHRL, CLGFRL, CLHHRL, CLGRL, CLHRL, CLRL, CRL, LGFRL, LGHRL, LGRL, LHRL, LLGFRL, LLGHRL, LLHRL, LRL, PFDRL, STGRL, STHRL, STRL.
Temporary fix
Comments
APAR Information
APAR number
PM76008
Reported component name
HLASM TOOLKIT
Reported component ID
569623401
Reported release
16A
Status
CLOSED PER
PE
NoPE
HIPER
NoHIPER
Special Attention
NoSpecatt / Xsystem
Submitted date
2012-10-26
Closed date
2012-12-14
Last modified date
2013-04-23
APAR is sysrouted FROM one or more of the following:
APAR is sysrouted TO one or more of the following:
UK90334 UK90335 UK90336
Modules/Macros
ASMMSTRT ASMMUTL6 ASMMUTL7
Fix information
Fixed component name
HLASM TOOLKIT
Fixed component ID
569623401
Applicable component levels
R16A PSY UK90334
UP12/12/18 P F212
R36A PSY UK90335
UP12/12/17 P 1212
R6IM PSY UK90336
UP12/12/17 P E512
Fix is available
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Document Information
Modified date:
23 April 2013