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OA62064: New Function - Data Gatherer CPU topology location support

A fix is available

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APAR status

  • Closed as new function.

Error description

  • new function
    

Local fix

Problem summary

  • ****************************************************************
    * USERS AFFECTED: RMF users                                    *
    ****************************************************************
    * PROBLEM DESCRIPTION: Data Gatherer support for CPU topology  *
    *                      location information for z16.           *
    ****************************************************************
    zArchitecture adds information related to CPU/core topology
    location for logical and physical core homes for z16. These
    metrics are stored in the PR/SM Partition data section of SMF
    record type 70.1 and in the Logical Processor section of
    Monitor III CPC data control block (ERBCPCDB).
    
    When APAR OA62064 is installed, SMF type 70 subtype 1 records
    with SMF record level x'8F' are produced. The version of
    measurement table ERBCPCB is set to x'0C'.
    
    +-------------------------------------------------------------+
    >>>>> SMF PRODUCT SECTION - SMF RECORD TYPE 70 SUBTYPE 1  <<<<<
    
    OFFSET  NAME      LEN FORMAT  DESCRIPTION
    51 x33  SMF70SRL   1  binary  SMF record level change number.
                                  This field enables processing of
                                  SMF record level changes in an
                                  existing release.
    
                                  SMF type 70 record levels for the
                                  current z/OS release:
                                  Subtype    Record level
                                     1       X'8F' (APAR OA62064)
                                     2       X'8F' (APAR OA59330)
    
    +-------------------------------------------------------------+
    >>>>> SMF RECORD TYPE 70 SUBTYPE 1                        <<<<<
    >>>>> PR/SM Logical Processor  Data Section               <<<<<
    
    OFFSET  NAME       LEN FORMAT  DESCRIPTION
    88 x58  SMF70LPF    1  binary  Additional processor flags.
                                   Bit  Meaning when set
                                     0  Topology has changed during
                                        this interval.
                                   1-7  Reserved.
    
    Fields SMF70MaxNL and SMF70CordL1 - SMF70CordL6 contain CPU
    topology location information for logical and physical core
    homes. This information is available with SMF record level
    SMF70SRL > X'8E'(142).
    
    89 x59  SMF70MaxNL  1  binary  Maximum number of topology
                                   nesting levels. The value is
                                   model dependent with a maximum
                                   of 6.
    
                                   Value   Meaning
                                     0     The model does not
                                           provide information
                                           about the topological
                                           nesting levels.
                                     1     There is no actual
                                           topological nesting
                                           structure.
                                   2-6     Topological nesting
                                           levels are available,
                                           beginning with field
                                           SMF70CordL1 up to field
                                           SMF70CordLx, where x is
                                           the value that defines
                                           the maximum number of
                                           topology nesting levels.
    90 x5A  SMF70CordL1 1  binary  Coordinate of the preferred
                                   dispatch location of the logical
                                   core at topological nesting
                                   level 1.
                                   Valid if SMF70MaxNL > 0.
    91 x5B  SMF70CordL2 1  binary  Coordinate of the preferred
                                   dispatch location of the logical
                                   core at topological nesting
                                   level 2.
                                   Valid if SMF70MaxNL > 1.
    92 x5C  SMF70CordL3 1  binary  Coordinate of the preferred
                                   dispatch location of the logical
                                   core at topological nesting
                                   level 3.
                                   Valid if SMF70MaxNL > 2.
    93 x5D  SMF70CordL4 1  binary  Coordinate of the preferred
                                   dispatch location of the logical
                                   core at topological nesting
                                   level 4.
                                   Valid if SMF70MaxNL > 3.
    94 x5E  SMF70CordL5 1  binary  Coordinate of the preferred
                                   dispatch location of the logical
                                   core at topological nesting
                                   level 5.
                                   Valid if SMF70MaxNL > 4.
    95 x5F  SMF70CordL6 1  binary  Coordinate of the preferred
                                   dispatch location of the logical
                                   core at topological nesting
                                   level 6.
                                   Valid if SMF70MaxNL > 5.
    96 x60  *           1          Reserved.
    
    +-------------------------------------------------------------+
    >>>>> MONITOR III ERBCPCDB                                <<<<<
    CPC data control block - CPCDB Header Section:
    
    OFFSET  NAME           LEN FORMAT  DESCRIPTION
    5   x5  CPC_VerNum      1  binary  CPCDB version x'0C'
    
    +-------------------------------------------------------------+
    >>>>> MONITOR III ERBCPCDB                                <<<<<
    CPC data control block - CPC Logical Processor Section:
    
    OFFSET  NAME           LEN FORMAT  DESCRIPTION
    6   x6  CPC_ProcChgInd  1  binary  Processor status-change
                                       indicators.
                                       Bit   Meaning when set
                                       ...
                                       7     Topology has changed.
                                       8-15  Reserved.
    ...
    Fields CPC_ProcMaxNL and CPC_ProcCordL1 - CPC_ProcCordL6
    contain CPU topology location information for logical and
    physical core homes. This information is available if
    CPC_VerNum > X'0B'.
    
    56  x38  CPC_ProcMaxNL  1  binary  Maximum number of topology
                                       nesting levels. The value is
                                       model dependent with a
                                       maximum of 6.
                                       Value  Meaning
                                         0    The model does not
                                              provide information
                                              about the topological
                                              nesting levels.
                                         1    There is no actual
                                              topological nesting
                                              structure.
                                       2-6    Topological nesting
                                              levels are available,
                                              beginning with field
                                              CPC_ProcCordL1 up to
                                              field CPC_ProcCordLx,
                                              where x is the value
                                              that defines the
                                              maximum number of
                                              topology nesting
                                              levels.
    57  x39  CPC_ProcCordL1 1  binary  Coordinate of the preferred
                                       dispatch location of the
                                       logical core at topological
                                       nesting level 1.
                                       Valid if CPC_ProcMaxNL > 0.
    58  x3A  CPC_ProcCordL2 1  binary  Coordinate of the preferred
                                       dispatch location of the
                                       logical core at topological
                                       nesting level 2.
                                       Valid if CPC_ProcMaxNL > 1.
    59  x3B  CPC_ProcCordL3 1  binary  Coordinate of the preferred
                                       dispatch location of the
                                       logical core at topological
                                       nesting level 3.
                                       Valid if CPC_ProcMaxNL > 2.
    60  x3C  CPC_ProcCordL4 1  binary  Coordinate of the preferred
                                       dispatch location of the
                                       logical core at topological
                                       nesting level 4.
                                       Valid if CPC_ProcMaxNL > 3.
    61  x3D  CPC_ProcCordL5 1  binary  Coordinate of the preferred
                                       dispatch location of the
                                       logical core at topological
                                       nesting level 5.
                                       Valid if CPC_ProcMaxNL > 4.
    62  x3E  CPC_ProcCordL6 1  binary  Coordinate of the preferred
                                       dispatch location of the
                                       logical core at topological
                                       nesting level 6.
                                       Valid if CPC_ProcMaxNL > 5.
    63  x3F  *              9          Reserved.
    
    +-------------------------------------------------------------+
    >>>>> MONITOR III ERBCPUDB                                <<<<<
    CPU data block - CPUDB Header Section:
    
    OFFSET  NAME           LEN FORMAT  DESCRIPTION
    56 x36  CPUFlags        4  binary  Flags
                                       Bit   Meaning when set
                                       ...
                                       9     CPUDB converted to
                                             lower service level
                                       10    CPUDB converted to
                                             higher release or
                                             service level
                                       11-31 Reserved
    

Problem conclusion

Temporary fix

Comments

  • KEYWORD: SMFREC/K
             E3931/K
    

APAR Information

  • APAR number

    OA62064

  • Reported component name

    RMF DATA GATHER

  • Reported component ID

    566527401

  • Reported release

    7B0

  • Status

    CLOSED UR1

  • PE

    NoPE

  • HIPER

    NoHIPER

  • Special Attention

    YesSpecatt / New Function / CST /

  •  

    Xsystem

  • Submitted date

    2021-08-31

  • Closed date

    2022-05-18

  • Last modified date

    2022-10-24

  • APAR is sysrouted FROM one or more of the following:

  • APAR is sysrouted TO one or more of the following:

    UJ08496 UJ08497 UJ08498

Modules/Macros

  • ERB3GCPC ERB3GGSS ERB3GINI ERB3GISS ERB3XDRS ERBMFDCP ERBMFICP
    ERBPPCON ERBSMF70 GRB3GCPC GRB3GGSS GRB3GINI GRB3GISS GRB3RACC
    GRB3RCCP GRB3RGTS GRB3RTBR GRB3XDRS GRBMFDCP GRBMFICP GRBPPCON
    GRBSMFRG
    

Publications Referenced
SA380667XXGC274935XX   

Fix information

  • Fixed component name

    RMF DATA GATHER

  • Fixed component ID

    566527401

Applicable component levels

  • R7B0 PSY UJ08498

       UP22/05/31 P F205  

  • R7C0 PSY UJ08497

       UP22/05/31 P F205  

  • R7D0 PSY UJ08496

       UP22/05/26 P F205  

Fix is available

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[{"Business Unit":{"code":"BU054","label":"Systems w\/TPS"},"Product":{"code":"SG19M"},"Platform":[{"code":"PF054","label":"z Systems"}],"Version":"7B0"}]

Document Information

Modified date:
24 October 2022