Exploiting the Dual Floating Point Units in Blue Gene/L
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Abstract
The IBM® Blue Gene®/L supercomputer consists of up to 65,536 compute nodes. Each compute node contains 2 Power PC® 440 processors, each enhanced with a specially designed dual Floating Point Unit (FPU). The presence of a second FPU on the Blue Gene/L processors theoretically allows double the performance on floating point algorithms over just using a single FPU. The IBM XL compilers can automatically take advantage of the dual FPU unit, but performance gains achieved by doing so depend strongly on the properties of the source code.
The attached paper describes the implementation of the dual FPU in Blue Gene/L and how to effectively exploit its performance capabilities.
Original publication date
2006/3/31
Cross Reference information
Segment
Product
Component
Platform
Version
Edition
Software Development
XL C/C++
Compiler
Linux
All Versions
Advanced Edition
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